isolation : 1500 vrms ? impedance : 100 ? ? rise time : 3.0 ns max. ? *between channels insertion loss (db max.) crosstalk (db min.)* return loss (db min.) 1-100 mhz 1-50 mhz 50-100 mhz 200-300 mhz 40 1-100 mhz 100-150 mhz 1-32 mhz 32-62 mhz 62-100 mhz -1.0 xmit -3.0 xmit -20 xmit -17 xmit -12 xmit -60 xmit xmit -55 xmit -45 rcv -1.0 rcv -3.0 rcv -17 rcv -20 rcv -12 rcv -55 rcv -50 rcv -40 electrical parameters @ 25 c high speed lan interface module csf8007ma rev. b 5/13/97 ? recommended for 10/100, 100 bx, 155 mb/s applications ? (requiring 1:1 magnetics) ? guaranteed to operate with 8 ma dc bias ? ? complies with or exceeds ieee 802.3, 10 bt/100 bx standards ? EPF8007M ocl 100 khz, 0.1 vrms 8 ma dc bias 350h cable side common mode rejection (db min.) dimensions a b c d e f g h i j k l m n p q dim. .880 .365 .355 .700 .005 .100 .490 .016 .008 .085 0 .025 min. .900 .385 .375 typ. .015 typ. .510 .022 .012 typ. 8 .045 max. .030 .100 .055 .540 nom. (inches) (millimeters) 22.35 9.27 9.02 17.78 .127 2.54 12.45 .406 .203 2.16 0 .635 min. 22.86 9.78 9.52 typ. .381 typ. 12.95 .559 .305 typ. 8 1.14 max. .762 2.54 1.40 13.72 nom. package p pad layout q m n e l e c t r o n i c s i n c . schematic receive channel 1 2 3 transmit channel 8 7 5 1:1 6 15 16 14 9 12 10 1:1 11 g l k i tel: (818) 892-0761 fax: (818) 894-5791 http://www.pca.com pca electronics, inc. 16799 schoenborn st. north hills, ca 91343 100-200 mhz xmit -50 rcv -45 a b pca EPF8007M date code pin 1 i.d. d j hf e c 300-400 mhz xmit -40 rcv -35 400-500 mhz xmit -35 rcv -30 product performance is limited to specified parameters. data is subject to chan g e without prior notice.
csf8007mb rev. b 5/13/97 high speed lan interface module the circuit below is a guideline for interconnecting pcas EPF8007M with a typical 100 bx phy chip for 100 mb/s applications over utp cable. further details of system design, such as chip pin-out, etc. should be obtained from the specific chip manufacturer. typical insertion loss of the isolation transformer is 0.5db. this parameter covers the entire spectrum of the encoded signals in 100/155 protocols. under terminated conditions, to transmit a 2v pk-pk signal across the cable, you must adjust the specific chip preset template control resistors to get at least 2.12v pk-pk across the transmit side input pins. it is recommended that system designers do not ground the receiver side center tap, via a capacitor. this may worsen emi, specifically if the secondary common mode termination is pulled to chassis ground as shown. the pulldown resistors on unused pins of the rj45 connector have been known to suppress unwanted radiation that unused wires pick up from the immediate environment. their placement and use are to be considered carefully before a design is finalized. the common mode termination load of 75 ? shown from the center taps of the secondary may be taken to chassis ground via a suitable cap. this depends upon the users design, emi margin, etc. it is recommended that there be a neat separation of ground planes in the layout. it is generally accepted practice to limit the plane off at least 0.05 inches away from the chip side pins of EPF8007M. there need not be any ground plane beyond this point. for best results, the pcb designer should design the outgoing traces preferably to be 50 ? , balanced and well coupled to achieve minimum radiation from these traces. typical application circuit for 100 bx over utp 100bx phy rj45* 1 2 6 3 rx+ rx- tx+ tx- 75 75 EPF8007M rcv xmit 11 16 15 2 1 6 49.9 49.9 .01 ? 2 kv 100 .01 ? 2 kv EPF8007M notes : * pin-outs shown are for dce configurations : e.g. hubs, repeaters e l e c t r o n i c s i n c . 9 8 10 7 vcc tel: (818) 892-0761 fax: (818) 894-5791 http://www.pca.com pca electronics, inc. 16799 schoenborn st. north hills, ca 91343
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